Packaging technology designed to electrically connect multiple die
Amkor has taken a proactive, strategic approach in the research and development of Chip-on-Chip (CoC). CoC is designed to electrically connect multiple die without the need for Through Silicon Via (TSV). Electrical interconnection is achieved via fine flip chip interconnects, sub 100 μm, in a face to face configuration. The mother die is connected to the package using flip chip bumps or wire bonds, typically at a coarser pitch to match the package. Two (or more) die can communicate more efficiently at faster speeds, with larger frequency bandwidth, reduced electrical resistance (R), inductance (L) and capacitive resistances, and at a lower cost than TSV.
In the wire bond package interconnect scheme, the CoC is connected to the package substrate via perimeter wire bonds on the mother die
The CoC may also be connected via POSSUM™ configuration. In this configuration, the mother die uses fine flip chip interconnects, sub 100 μm, and coarser pitch bumps to interconnect to the package substrate. The daughter dice is thinned to allow for underfill clearance during package assembly. An added benefit of the POSSUM™ configuration is reduced Z-height of the CoC and overall package
Complementary to CoC, Amkor’s Chip-on-Wafer (CoW) enables the mother wafer to not be sawn. Rather, it is used as the substrate populated with sawn daughter die. Besides the many advantages of CoC, CoW provides the added benefit of simplified logistics and chip set test. Both 200 and 300 mm are supported with a wide range of die sizes and chip stack thicknesses
Amkor supports a wide range of products with CoC technology in a variety of applications in the micro sensors, automotive microcontroller, wireless, optoelectronics and mobile arena.
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