Smaller form factors with improved electrical performance

Amkor’s Flip Chip CSP (fcCSP), a flip chip solution in a Chip Scale Package (CSP) format. The advantages of flip chip interconnect are multiple: it provides enhanced electrical performance over standard wirebond technology, allows for a smaller form factor due to increased routing density, and eliminates wire-bond loops.

fcCSP is based on Amkor’s proprietary ChipArray® BGA (CABGA) package construction, using cutting-edge thin core laminate substrates. The package is assembled in strip format, in either bare die or overmolded format, and saw singulated for manufacturing efficiency and cost minimization. Pattern plating for fine line/spaces, via-in-pad substrate structure, and thin core substrate panel processing allow for increased routing density and enhanced electrical performance, making fcCSP an attractive option for advanced CSP applications where electrical performance is a critical factor.

fcCSP package is an attractive option for handheld/portable electronics where, in addition to performance, package size is critical. Some applications which have adopted fcCSP are high-performance workstations, servers, data communication products and some emerging applications including RF applications where electrical performance is critical. The elimination of wirebond loops allows for a low inductance connection to the die while the increased routing density enables optimized electrical paths for critical high-frequency signal lines.

Features

  • Can design to high-frequency applications of 60+ GHz
  • 9–1500 ball counts
  • Array strip production
  • Thin core laminate or buildup substrate construction
  • Bare die with underfill, overmolded, molded underfill and exposed die molded versions available
  • Accommodates package sizes from 2–17 mm
  • Flip chip bump pitches of 80 μm peripheral and 130 μm area array
  • Cu pillar flip chip interconnects for fine bond pitches down to 30 μm/60 μm staggered
  • Available in 0.4–1.0 mm BGA ball pitch, as well as Land Grid Array (LGA) interconnect

  • Minimum package thickness of < 0.4 mm for LGA interconnect, < 0.6 mm for 0.4 mm and 0.5 mm BGA pitch
  • Turnkey solution – design, bumping, bumped wafer probe, backgrind, assembly, and test
  • Much better signal to noise ratio at higher frequencies (>1 GHz) versus wire bonded packages
  • Low inductance of flip chip bumps – short, direct signal path
  • Flexible customizable substrate routing. Smaller possible body size than wirebond CSP due to additional space not required for wirebond pads

Questions?

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