新一代凸块技术,以实现更大密度、可靠性和性能

Copper pillar bump enables finer pitches making it an excellent interconnect choice for applications such as transceivers, embedded/application processors, power management, baseband, ASICs and SOCs. This technology allows for smaller devices, reduces the number of substrate package layers and is ideal for devices that require some combination of fine pitch, RoHS/green compliance, low cost, and electromigration performance.

铜柱平台

  • 小节距 CSP
  • 面阵小节距 FCBGA
  • µBump:F2F、TSV

生产状态

  • 自 2010 年起已交付超过 3 亿件设备
  • 铜、无铅及铜/镍/无铅
  • 14 纳米生产工艺

封装结构

  • 裸晶 CSP/
  • 模塑 PoP/TMV®
  • TSV
  • FCBGA

有问题?

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