높은 밀도, 신뢰성 및 성능을 위한 차세대 bump 기술

Copper pillar bump enables finer pitches making it an excellent interconnect choice for applications such as transceivers, embedded/application processors, power management, baseband, ASICs and SOCs. This technology allows for smaller devices, reduces the number of substrate package layers and is ideal for devices that require some combination of fine pitch, RoHS/green compliance, low cost, and electromigration performance.

Copper pillar 플랫폼

  • Fine pitch CSP
  • Area array fine pitch FCBGA
  • µBump : F2F, TSV

생산 현황

  • 2010년부터 300M unit 이상 출하
  • Copper, lead-free and copper/Ni/lead-free
  • 14nm in production

패키지 구조

  • Bare die CSP/PoP
  • Molded PoP/TMV®
  • TSV
  • FCBGA

Q & A

앰코에 대해 궁금한 점이 있다면 하단의 ‘문의하기’를 클릭하세요.