Amkor Technology invites you to join us at the Chiplet Summit on February 6-8 at the Santa Clara Convention Center in Santa Clara, California.
Vineet Pancholi, Sr Director, Test Technology at Amkor Technology will present “Chiplet Integration and Production Test Simplification.”
The chiplet-based design adds new issues to the production test workflow. With standards like the Universal Chiplet Interconnect Express (UCIeTM) standards emerging, the complete chiplet ecosystem is dynamically getting architected, implemented, and deployed, within the manufacturing workflow. Tests must cover individual chiplets, the interconnections among them, and the entire package. Depending on the design complexity, testing could significantly increase time-to-market. How can developers keep such effects at a tolerable and affordable level? What are the test simplifications to consider as chiplet integration continues into mainstream production? Is there design for test (DFT) methods available, which when included in the architecture will help with test coverage and yet simplify production testing? Does design and package resiliency play a role in optimal quality product introduction? What are the impacts of chiplet integration on the Automotive segment? EDA (Electronic Design Automation) companies and IEEE forums have significantly contributed and continue to contribute towards chiplet integration. Automation must be stressed, and new techniques such as agent-based monitoring must be evaluated. Only a thorough integration of test with the entire development process will do the job. Manufacturing test flows must be altered for the most optimal test coverage. System Level Test (SLT) will continue to play a vital role in Manufacturing Test Flows. Content re-distribution in each test step may be necessary.