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Through Silicon Via (TSV) interconnects have emerged to serve a wide range of 2.5D TSV and 3D TSV packaging applications and architectures that demand very high performance and functionality at the lowest energy/performance metric. To enable the use of TSVs in 2.5D/3D TSV architectures, we have developed several back-end technology platforms to enable high volume processing of TSV-bearing wafers and assembly. Amkor’s TSV wafer process begins with 300 mm wafers which have TSVs already formed. Our wafer process thins the wafers and creates backside (BS) metallization to complete the TSV interconnection. The TSV reveal and back side metallization process flow is commonly referred to as Middle-End-Of-Line (MEOL). Amkor does not provide TSV formation in foundry wafers.

앰코의 MEOL 생산 도구 및 공정은 다음과 같습니다.

  • Wafer support bond and debonding
  • TSV wafer thinning
  • TSV reveal and CMP
  • Back side passivation
  • Redistribution as required
  • Lead-free plating of micro-pillar and C4 interconnects
  • Wafer level probe and mid-assembly test for TSV products

Q & A

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